Bias Stress Stability of Electric-double-layer ZnO Thin-film Transistor

Cong WANG; Yu-rong LIU; Qiang PENG; He HUANG

doi:10.37188/CJL.20210324

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Bias Stress Stability of Electric-double-layer ZnO Thin-film Transistor

Device Fabrication and Physics | 更新时间：2022-01-14

- Bias Stress Stability of Electric-double-layer ZnO Thin-film Transistor
  增强出版
- Chinese Journal of Luminescence Vol. 43, Issue 1, Pages: 129-136(2022)
- 作者机构：
  
  1.汕尾职业技术学院　海洋学院，广东　汕尾　516600
  2.汕尾市海洋产业研究院　新能源材料与催化工程研究中心，广东　汕尾　516600
  3.华南理工大学　微电子学院，广东　广州　510640
- 作者简介：
- 基金信息：
  
  Special Project in Key Fields of the Higher Education Institutions of Guangdong Province (the New Generation of Communication Technology), China(2020ZDZX3125);Project supported by the National Natural Science Foundation of China(61871195);Basic and Applied Basic Research Foundation of Guangdong Province, China(2021A1515011872);Scientific research project of Shanwei Institute of Technology(SWKT19-011)
- DOI：10.37188/CJL.20210324
  CLC： TN321⁺.5
- Published：2022-01，
  
  Received：12 October 2021，
  
  Revised：27 October 2021，
扫描看全文
Cong WANG, Yu-rong LIU, Qiang PENG, et al. Bias Stress Stability of Electric-double-layer ZnO Thin-film Transistor. [J]. Chinese Journal of Luminescence 43(1):129-136(2022)
DOI：

Cong WANG, Yu-rong LIU, Qiang PENG, et al. Bias Stress Stability of Electric-double-layer ZnO Thin-film Transistor. [J]. Chinese Journal of Luminescence 43(1):129-136(2022) DOI： 10.37188/CJL.20210324.

摘要

以环保可降解的天然生物材料制备功能器件越来越受到关注，利用天然鸡蛋清作为栅介质层，采用射频磁控溅射法在其上沉积ZnO 薄膜有源层，制备低压双电层氧化锌基薄膜晶体管(ZnO-TFT)并对其电学特性进行了表征，研究了器件在栅偏压和漏偏压应力下电性能的稳定性及其内在的物理机制。该ZnO-TFT 器件呈现出良好的电特性，载流子饱和迁移率为5.99 cm

/(V·s)，阈值电压为2.18 V，亚阈值摆幅为0.57 V/dec，开关电流比为1.2×10

，工作电压低至3 V。研究表明，在偏压应力作用下，该ZnO-TFT 器件电性能存在一定的不稳定性，我们认为栅偏压应力引起的电性能变化可能来源于栅介质附近及界面处的正电荷聚集、充放电效应和新陷阱态的复合效应；漏偏压应力引起的电性能变化可能来源于焦耳热引起的氧空位及沟道中的电子陷阱。

Abstract

The use of environmentally friendly and degradable natural biomaterials to make functional devices has attracted more and more attention. Low-operating-voltage electric-double-layer(EDL) ZnO thin-film transistor(ZnO-TFT) was prepared by radio frequency magnetron sputtering by using natural albumen as a gate dielectric layer and ZnO as an active layer. The electrical characteristics of EDL ZnO-TFT was characterized

and the stability and its physical mechanism of the device under gate-bias and drain-bias stresses were investigated. The ZnO-TFT shows good electrical properties with a saturation mobility of 5.99 cm

/(V·s)

a threshold voltage of 2.18 V

a subthreshold swing of 0.57 V/dec

an on/off current ratio of 1.2×10

and an operating voltage of less than 3 V. Bias-stress stability analysis indicated that the electrical properties of the ZnO-TFT have obvious instability under the gate and drain bias stresses. We believe that the change of electrical properties caused by gate bias stress may come from the positive charge accumulation near the gate dielectric and the interface

the charge discharge effect and the composite effect of new trap states; the change of electrical properties caused by drain bias stress may come from the oxygen vacancy caused by Joule heat and the electron trap in the channel.

关键词

薄膜晶体管氧化锌双电层偏压应力稳定性

Keywords

thin-film transistorzinc oxideelectric double layerbias stressstability

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Related Institution

School of Ocean， Shanwei Institute of Technology

School of Microelectronics， South China University of Technology

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