多芯CSP-LED芯片间距对热拥堵的影响

刘倩; 熊传兵; 汤英文; 李晓珍; 王世龙

doi:10.3788/fgxb20204103.0308

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多芯CSP-LED芯片间距对热拥堵的影响

器件制备及器件物理 | 更新时间：2020-08-12

- 多芯CSP-LED芯片间距对热拥堵的影响
- Influence of Multi-core CSP-LED Chip Spacing on Thermal Congestion
- 发光学报 2020年41卷第3期页码：308-315
- 作者机构：
  
  闽南师范大学物理与信息工程学院,福建漳州,363000
- 作者简介：
- 基金信息：
  
  国家自然科学基金（51072076）();福建省科技厅产学合作项目（2018H6015）();福建省高校创新团队培育计划（201821）资助项目()
- DOI：10.3788/fgxb20204103.0308
  中图分类号： TN304
- 纸质出版日期：2020-3-5，
  
  网络出版日期：2020-1-6，
  
  收稿日期：2019-12-12，
  
  修回日期：2020-1-4，
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刘倩, 熊传兵, 汤英文等. 多芯CSP-LED芯片间距对热拥堵的影响[J]. 发光学报, 2020,41(3): 308-315

LIU Qian, XIONG Chuan-bing, TANG Ying-wen etc. Influence of Multi-core CSP-LED Chip Spacing on Thermal Congestion[J]. Chinese Journal of Luminescence, 2020,41(3): 308-315
刘倩, 熊传兵, 汤英文等. 多芯CSP-LED芯片间距对热拥堵的影响[J]. 发光学报, 2020,41(3): 308-315 DOI： 10.3788/fgxb20204103.0308.

LIU Qian, XIONG Chuan-bing, TANG Ying-wen etc. Influence of Multi-core CSP-LED Chip Spacing on Thermal Congestion[J]. Chinese Journal of Luminescence, 2020,41(3): 308-315 DOI： 10.3788/fgxb20204103.0308.

摘要

在铝基板上贴片了不同间距的四颗芯片级封装发光二级管（CSP-LED）模组，测试了不同贴片间距CSP-LED模组的EL光谱、流明效率、光通量、相关色温等光电参数。结果显示，在小电流（20~400 mA）下，随着注入电流的增大，不同排布间距的蓝、白光样品的光电性能基本呈现相同的变化规律，即光通量、光功率呈线性增长，光效基本保持稳定；在大电流（1~1.5 A）下，随着芯片间排布间距减小，EL光谱积分强度降低，色温升高，红色比下降，排布间距为0.2 mm的光通量衰减了84.58%，相比之下排布间距为3 mm和5 mm的光通量衰减明显减缓，分别为8.96%和3.58%，这些现象与禁带宽度、热应力、非辐射复合等因素有关。结果表明，CSP白光LED光通量衰减主要是荧光粉退化导致的，考虑到实际生产成本问题，排布间距为3 mm时，有利于热量散出，进而提高LED光电性能特性及其自身的使用寿命。

Abstract

Four chip-scale packaged light-emitting diode (CSP-LED) modules with different pitches were mounted on an aluminum substrate. The EL spectrum

lumen efficiency

luminous flux

correlated color temperature and other photoelectric parameters of CSP-LED modules with different patch pitches are measured. The results show that under low current (20~400 mA)

with the increase of the injection current

the photoelectric properties of blue and white light samples with different arrangement intervals basically show the same change law. It is like that the luminous flux and optical power increase linearly

and the optical efficiency is basically stable. Under high current (1~1.5 A)

as the arrangement spacing between chips decreases

the integrated intensity of the EL spectrum decreases

the color temperature increases

the red ratio decreases

and the luminous flux with an arrangement spacing of 0.2 mm attenuated by 84.58%. In contrast

the attenuation of luminous flux at 3 mm and 5 mm arrangement spacing is significantly slowed down

8.96% and 3.58%

respectively. These phenomena are related to factors such as the forbidden band width

thermal stress

and non-radiative recombination. The results show that the main reason for the attenuation of CSP white LED light flux is the degradation of phosphors. Considering the actual production cost

when the spacing is 3 mm

it is conducive to heat dissipation

thereby improving the LED photoelectric performance characteristics and its own service life.

关键词

芯片级封装发光二极管热拥堵排布间距

Keywords

chip-scale packaged(CSP)light-emitting diode(LED)thermal congestionlayout structure

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