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中国科学院半导体研究所, 北京, 100083
收稿日期:2002-08-11,
修回日期:2002-12-23,
纸质出版日期:2003-03-20
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孙国胜, 孙艳玲, 王雷, 赵万顺, 罗木昌, 李建平, 曾一平, 林兰英. Si(100)衬底上n-3C-SiC/p-Si异质结构研究[J]. 发光学报, 2003,24(2): 130-134
SUN Guo-sheng, SUN Yan-ling, WANG Lei, ZHAO Wan-shun, LUO Mu-chang, LI Jian-ping, ZENG Yi-ping, LI Jin-min, LIN Lan-ying. Investigation of n-3C-SiC/p-Si Heterojunctions on Si(100)[J]. Chinese Journal of Luminescence, 2003,24(2): 130-134
孙国胜, 孙艳玲, 王雷, 赵万顺, 罗木昌, 李建平, 曾一平, 林兰英. Si(100)衬底上n-3C-SiC/p-Si异质结构研究[J]. 发光学报, 2003,24(2): 130-134 DOI:
SUN Guo-sheng, SUN Yan-ling, WANG Lei, ZHAO Wan-shun, LUO Mu-chang, LI Jian-ping, ZENG Yi-ping, LI Jin-min, LIN Lan-ying. Investigation of n-3C-SiC/p-Si Heterojunctions on Si(100)[J]. Chinese Journal of Luminescence, 2003,24(2): 130-134 DOI:
利用LPCVD方法在Si(100)衬底上获得了3C-SiC外延膜
扫描电子显微镜(SEM)研究表明3C-SiC/p-Si界面平整、光滑
无明显的坑洞形成。研究了以In和Al为接触电极的3C-SiC/p-Si异质结的
I-V
C-V
特性及
I-V
特性的温度依赖关系
比较了In电极的3C-SiC/p-Si异质结构和以SiGe作为缓冲层的3C-SiC/SiGe/p-Si异质结构的
I-V
特性
实验发现引入SiGe缓冲层后
器件的反向击穿电压由40V提高到70V以上。室温下Al电极3C-SiC/p-Si二极管的最大反向击穿电压接近100V
品质因子为1.95。
Recently there has been an increased effort to develop cubic (3C-) SiC owning to its high electron mobility and high-saturation driftvelocity for the fabrication of high-power and high-temperature electronic devices. In this paper
we re po rt on the growth and electrical properties of voids-free n-3C-SiC/p-Si heter ojun ctions grown by LPCVD. The substrates are 2-inch p-type Si (100) wafers with resistivity of 10~12Ω·cm. SiH
4
C
2
H
4
and Pd-cell purified H
2
were used as precurso r gases with flow rates of 2
3sccm
and 3000 sccm
respectively. The LPCVD method at 5.32×10
4
Pa was employed to grow 3C-SiC epitaxial films. In order to prevent the formation of voids and obtain improved interface of 3C-SiC/Si
much at tention has been paid to the pretreatment and carbonization process of the subst rates. It was obtained that the SiC/Si interface is smooth and there is no obvious voids formed in the Si substrate surface. This result indicates that the out-diffusion of Si atoms from Si substrates was suppressed during the epitaxial gro wth of SiC at 1250℃. Hall-effect measurements were performed to investiga te the electrical properties of the grown films with about 1.5μm in thickness in the temperature range from 80 to 300K. The mobility was 408cm
2
/Vs with the carrier concentration was about 7.2×10
17
cm
-3
at room temperature. Hall mobility obeys the T-α law in temperature range from 300 to 130K
where the value of α is 1.2. The I-V
C-V
and the temperature dependence of I-V curves in 3C-SiC heterojunctions with indium (In) and aluminum (Al) electrical pads
respectively
were in vestigated. The heterojunctions diodes (HJDs) with 0.5~1mm
2
in area were obt ain ed by cleaving n-3C-SiC/p-Si. It was shown that with the introduction of a th in SiGe buffer layer between 3C-SiC and Si substrate
the reverse breakdown voltage and the current rectification ratio defined at ±1V bias were improved from 40V to 70V and from 3×10
2
to 7×10
3
respectively
for the diodes with In electrod es. The highest reverse breakdown voltage of approximately 100V was obtained in the 3C-SiC/p-Si heterojunctions with Al electrodes at room temperature. At low current densities the dependence of the forward current on voltage is exponential with the ideality factor of
n
=1.95 for both Al and In heterojunction diodes. The C-V characteristics of the diodes were linear in the
C
-2
-V co ordinates
which means that the obtained n-3C-SiC/p-Si heterojunctions were abrupt. A built-in voltage (
V
bi
) of 0.75V was obtained.
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